The preset invention relates to board production technology for boards having microscopic circuit patterns such as semiconductor devices and liquid crystal and, more particularly, to a technique for inspecting patterns of semiconductor devices, photomasks, and the like.
Semiconductor devices are manufactured by repeating a process of printing a pattern formed with a photomask on a wafer by lithography and etching. To inspect such a pattern, identifying a defect by obtaining a Scanning Electron Microscope (SEM) image of the pattern is performed. Recently, as patterns have become finer and finer, contact holes become more difficult to form. The number of disconnected failure patterns occurring inside the contact holes notably increases and there is a need for a high sensitivity defect detection technique.
A wafer cross section view 400 is shown in FIG. 4 to depict a contact hole defect. This section of a wafer structure is made by growing a silicon oxide film 405 on a silicon substrate 404, patterning contact holes, and filling the holes with metal. Among the contact holes, there are a normal pattern 401 and a disconnected failure pattern 402. To detect this defective contact hole, after charging the wafer, a voltage contrast image should be obtained to distinguish between the normal pattern and the disconnected failure pattern having different electrical resistances resulting in different potentials of changing voltage which are represented as difference in the number of secondary electrons.
A method of obtaining a voltage contrast image and a principle of defect detection are described. A voltage contrast image may be obtained by either (1) positively charging or (2) negatively charging the surface of a sample. The polarity of charging appropriate for inspection differs, depending on the wafer structure to be inspected. The polarity of charging can be changed, depending on a condition for inspection. For instance, there is a method of changing incident electron beam energy (e.g., refer to L. Reimer: Scanning Electron Microscopy, Springer-Verlag, Berlin Heidelberg, 1998).
Now, let us discuss another method in which the voltage of charging voltage control electrodes 407 installed facing toward the wafer is changed. For both positive charging and negative charging, the energy of an incident electron beam 410 onto the wafer is controlled so that the efficiency of secondary electron emission from the wafer will be 1 or more (e.g., 500 eV).
(1) In the case of positive charging; the voltage of the charging voltage control electrodes 407 is set so that an electric field generated in the vicinity of the wafer accelerates the secondary electrons. Specifically, as shown in FIG. 5 (an enlarged view of a beam irradiation area), a positive charging voltage potential 501 is formed above the wafer. When the electron beam hits the normal pattern 401 and the disconnected failure pattern 402, the secondary electrons 502 emitted therefrom are accelerated by the potential 501 and the disconnected failure pattern 402 is positively charged. The normal pattern 401 is not charged because it is electrified from the substrate 404. Because of the positively charged state of the disconnected failure pattern 402, a low energy portion of secondary electrons 503 from it is drawn back to the wafer. On the other hand, because the normal pattern 401 is not charged with the beam, all secondary electrons 504 from it are emitted. As a result, a voltage contrast 505 is obtained and the disconnected failure can be detected as a dark object in the image (e.g., refer to H. Nishiyama, et al.: SPIE 4344, p. 12 (2001), Japanese Patent Application Laid-Open No. 2001-313322).
(2) In the case of negative charging; the voltage of the charging voltage control electrodes 407 is set so that the electric field generated in the vicinity of the wafer decelerates the secondary electrons to make them back to the wafer. Specifically, as shown in FIG. 6 (an enlarged view of a beam irradiation area), a negative charging voltage potential 601 is formed above the wafer. When the electron beam hits the normal pattern 401 and the disconnected failure pattern 402, the secondary electrons 602 emitted therefrom are drawn back to the wafer by the potential 601 and, consequently, the disconnected failure pattern 402 is negatively charged. Because of the negatively charged state of the disconnected failure pattern 402, the secondary electrons 603 from it are accelerated and emitted without being drawn back by the negative charging voltage potential 601. On the other hand, because the normal pattern is not charged with the beam, all secondary electrons 604 from it are drawn back to the wafer. As a result, a voltage contrast image 605 is obtained and the disconnected failure can be detected as a light object in the image (e.g., refer to Japanese Patent Application Laid-Open No. 11-121561).